August 23rd, 2018 — By adopting the advanced process technology, the semiconductor industry gained significant improvement in power, performance, and area. However, chip designers face many challenges like timing closure, leakage, and dynamic power optimization when they want to integrate more instances and complex designs into a small chip area. When it moves forward to advanced FinFET technology, dynamic power becomes one of the major challenges. We do see many cases in which clock networks contribute more than 40% of the total dynamic power of a chip. Based on the need, Dorado provides ECO solutions specifically for clock networks to save dynamic power effectively.
For dynamic power optimization in the clock network, we introduce the automatic dynamic power recovery solutions and the design knowledge sharing platform with user-friendly GUI in our Tweaker ECO Platform. Firstly, we create the concept of the dynamic power ECO domain. Secondly, we adopt two different kinds of heuristic and dynamic programming algorithms to adjust clock network with critical timing scenarios well watched. Thirdly, with the Tweaker GUI, users can summarize all of the analysis, and easily review the result of dynamic power recovery with power, timing, physical data and reliability information. In conclusion, Tweaker dynamic power ECO solution specifically for clock network can effectively help designers to identify and optimize the key contributors of dynamic power and review the impact on the multi-scenario timing and total power.
The IR drop issue is always influenced by number of factors. One-way information like timing, power, or IR drop won?t be sufficient to analyze the issue. Tweaker-R1 helps us to integrate all design information on a single platform. This platform integrates information including Timing, Power, and Physical maps?etc. It results into the reduction of efforts required for data crossing with different tools and manual ECO time.
Dorado has created a complete ECO platform which collects all physical, timing and power information. The powerful ECO platform supports all kinds of complex chip designs to achieve PPA goals. In the next generation of power ECO solution, we are going to integrate this powerful ECO platform and clock structures, so more dynamic power can be saved. Our commitment is to provide the best ECO solution to the industry. The designers can deliver chips smoothly with the best QoR when using the most advanced FinFET technology. Learn more about Tweaker-C1 Clock ECO and Tweaker-P2 Power Recovery.