June 7th, 2019 — Wave Computing? Inc., the Silicon Valley company accelerating artificial intelligence (AI) from the data center to the edge, and Imperas Software Ltd., the leader in virtual platforms and software simulation, introduced a new Instruction Set Simulator (ISS) for the MIPS Open? community of SoC designers and processor architects, called MIPSOpenOVPsim?. MIPSOpenOVPsim is available for download through the MIPS Open program.
MIPSOpenOVPsim is a MIPS system architecture simulator, available at no cost, which implements a complete single-core CPU. This downloadable tool delivers industry standard simulations to test commercial SoC design performance and quality.
— A jump-start to software and firmware development during the SoC design cycle
— Early-stage implementation testing and Design Verification (DV) of MIPS CPU core designs
— Acceleration of compliance testing by providing a reference environment
MIPSOpenOVPsim helps SoC developers by providing a comprehensive testing platform for all MIPS Open specifications and extensions including:
— The MIPS 32 and 64-bit Instruction Set Architecture (ISA) Release 6 licensed under MIPS Open
— MIPS SIMD Extensions v. 1.0
— MIPS DSP Extensions
— MIPS Multi-Threading (MT)
— MIPS MCU
— microMIPS Architecture
— MIPS Virtualization (VZ)
Highlights of MIPSOpenOVPsim include:
Model: A configurable MIPS R6 Fast Processor Model as a full, single core implementation of the full 32 and 64-bit MIPS instruction set specifications. This complete, flexible model covers all envelope configurations and the instruction-accurate model can be configured to any single core configuration. It is also suitable as a platform target to develop bare metal applications and also models the MIPS32 microAptiv cores recently made available within the MIPS Open Program.
Simulator: MIPSOpenOVPsim includes an instruction-accurate MIPS CPU simulator, based on the world-class Imperas Open Virtual Platform (OVP) simulator technology. MIPSOpenOVPsim delivers exceptionally fast, high-performance simulations, running over 500 million instructions per second on a standard host PC (Windows or Linux). The platform also includes runtime configurable settings for all MIPS Open specifications, making it very easy to compare runtime results with RTL implementations.
MIPSOpenOVPsim is an entry ramp for software development, SoC testing and verification. For developers of more advanced designs who need multi-core support and advanced debug tools, Imperas also offers full-capability virtual platforms. MIPSOpenOVPsim includes a freedom to use license model from Imperas, which supports commercial as well as academic use. Further details are available at http://www.imperas.com.
?Having partnered with the Wave Computing MIPS engineering team and IP customers over the past decade, our model and simulation technology has enabled MIPS-based devices to be deployed across a broad range of embedded markets,? said Simon Davidmann, president and CEO, Imperas. ?This no-cost instruction set simulator is an ideal start for developers looking to explore the potential of various SoC designs through Wave Computing?s MIPS Open program.?
?The Imperas simulation and modeling technology has been a reliable and high-quality testing model used internally by the MIPS engineering team for many years,? said Krishna Raghavan, president of Wave Computing?s MIPS IP Licensing business. ?We?re delighted to partner with Imperas to make this industrial-grade simulation technology available to support the MIPS Open program and further the momentum around open hardware development.?